This work investigates the impact of process variability on Full Adder circuits, analyzing delay and energy consumption under both nominal and near-threshold voltage operation. As technology scales, variability effects become more pronounced, directly impacting circuit reliability and performance.

A set of traditional and XOR-based Full Adder topologies were evaluated, including the adoption of Decoupling Cells as a mitigation technique. The analysis compares different operating conditions, from standard nominal voltage to low-power near-threshold scenarios.

The results show that near-threshold operation enables significant power savings, reducing energy consumption by up to 97% on average. However, this comes with trade-offs, including delay penalties of up to 6.4× and increased sensitivity to process variability. Among the evaluated designs, the Mirror Full Adder provides the best performance at nominal voltage.

XOR-based Full Adders demonstrated lower sensitivity to variability effects on power, regardless of the operating voltage. Additionally, the use of Decoupling Cells proved effective in mitigating variability impacts, reducing power consumption and improving robustness across all evaluated circuits. These results highlight important trade-offs between power efficiency, performance, and variability resilience in advanced designs.

1. https://doi.org/10.1016/INTEGRATION2022