Radiation effects & variability in combinational cells
Peer-reviewed work on single-event transients (SET), process variability and hardening techniques for arithmetic circuits in FinFET technologies.
SET Mitigation Techniques for Full Adders at 7 nm
Mirror, Hybrid, TGA and TFA full adders under nominal and near-threshold operation, hardened with decoupling cells and transistor sizing.
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SET Mitigation for Mirror and Hybrid Full Adders
Decoupling cells and transistor sizing applied to two full adder topologies in 7 nm FinFET.
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Process Variability in XOR-based Full Adders
Delay and energy of traditional and XOR-based full adders under process variability, at nominal and near-threshold voltage.
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SET Mitigation Techniques on a Mirror Full Adder
Evaluating hardening techniques for the Mirror full adder at nominal and near-threshold voltage.
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SET Susceptibility on a Mirror Full Adder
Node-by-node radiation sensitivity of the Mirror full adder in 7 nm FinFET.
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XOR Gates: Electrical Behavior and SET Impact
Nine XOR topologies across CMOS and FinFET, logic families, temperature and near-threshold operation.
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Radiation Effects on 16 nm XOR Gates
Single-event transient robustness of XOR gate topologies at the 16 nm node.
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